Simulation of post-breakdown transistor performance in ultrathin gate dielectrics-based nanoscale MOSFETs
The purpose of this project is to simulate the post-breakdown transistor performance in ultrathin gate dielectric. The simulator used was TSUPREM-4 and MEDICI, which is widely used in the semiconductor industry for simulation and analyze semiconductor processing. The simulation was done on a 0.13μm...
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2009
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| 機構: | Nanyang Technological University |
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sg-ntu-dr.10356-171882023-07-07T16:47:57Z Simulation of post-breakdown transistor performance in ultrathin gate dielectrics-based nanoscale MOSFETs Yaw, Meng Kwan. Pey Kin Leong School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Semiconductors The purpose of this project is to simulate the post-breakdown transistor performance in ultrathin gate dielectric. The simulator used was TSUPREM-4 and MEDICI, which is widely used in the semiconductor industry for simulation and analyze semiconductor processing. The simulation was done on a 0.13μm metal-oxide-semiconductor field-effect transistor (MOSFET) which has silicon and silicon oxide defects introduced into the gate dielectric. Various different doping defects and silicon oxide defects are added into the simulation to test for the post-breakdown I-V characteristics of the transistor. Bachelor of Engineering 2009-06-01T04:57:58Z 2009-06-01T04:57:58Z 2009 2009 Final Year Project (FYP) http://hdl.handle.net/10356/17188 en Nanyang Technological University 131 p. application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Semiconductors Yaw, Meng Kwan. Simulation of post-breakdown transistor performance in ultrathin gate dielectrics-based nanoscale MOSFETs |
| description |
The purpose of this project is to simulate the post-breakdown transistor performance in ultrathin gate dielectric. The simulator used was TSUPREM-4 and MEDICI, which is widely used in the semiconductor industry for simulation and analyze semiconductor processing. The simulation was done on a 0.13μm metal-oxide-semiconductor field-effect transistor (MOSFET) which has silicon and silicon oxide defects introduced into the gate dielectric. Various different doping defects and silicon oxide defects are added into the simulation to test for the post-breakdown I-V characteristics of the transistor. |
| author2 |
Pey Kin Leong |
| author_facet |
Pey Kin Leong Yaw, Meng Kwan. |
| format |
Final Year Project |
| author |
Yaw, Meng Kwan. |
| author_sort |
Yaw, Meng Kwan. |
| title |
Simulation of post-breakdown transistor performance in ultrathin gate dielectrics-based nanoscale MOSFETs |
| title_short |
Simulation of post-breakdown transistor performance in ultrathin gate dielectrics-based nanoscale MOSFETs |
| title_full |
Simulation of post-breakdown transistor performance in ultrathin gate dielectrics-based nanoscale MOSFETs |
| title_fullStr |
Simulation of post-breakdown transistor performance in ultrathin gate dielectrics-based nanoscale MOSFETs |
| title_full_unstemmed |
Simulation of post-breakdown transistor performance in ultrathin gate dielectrics-based nanoscale MOSFETs |
| title_sort |
simulation of post-breakdown transistor performance in ultrathin gate dielectrics-based nanoscale mosfets |
| publishDate |
2009 |
| url |
http://hdl.handle.net/10356/17188 |
| _version_ |
1772827848269103104 |