Quantum correction hardware accelerator design on FPGA

• 主要作者: Soh, Siang Yang
• 其他作者: Goh Wang Ling
• 格式: Final Year Project
• 語言: English
• 出版: Nanyang Technological University 2024
• 主題: Engineering; Quantum error correction hardware accelerator; Verilog neural network
• 在線閱讀: https://hdl.handle.net/10356/176232

This project investigates alternative hardware solutions for quantum error correction, focusing on replacing the slow and computationally expensive MWPM error decoder with more efficient methods. Through thorough prototyping and evaluation, the Connected Neural Network (NN) approach emerged as the s...