Testing of memory devices : a case study

• Main Author: Fong, Siew Cheong.
• Other Authors: Ho, Duan Juat
• Format: Theses and Dissertations
• Language: English
• Published: 2009
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems
• Online Access: http://hdl.handle.net/10356/19611
• Institution: Nanyang Technological University

The project examines the testing of the EPROM devices (on wafer) carried out in a local multinational company, analyses the fault coverage and proposes methods to improve the test yield. Using actual test yield data obtained from the test floor, the project examines and proposes to remove the need for certain test processes like the thermal storage of EPROM which typically takes up between 12 to 48 hours. In addition, the industrial practice of testing of DRAM chips and its fault coverage are examined. It had been reported that with the use of lDDQ tests together with March Tests, the effectiveness for testing DRAM can be improved from an algorithm complexity of (16n) to (5n + 4), where n represents the number of cells in a DRAM.