Optional layout of input / output protection devices

Optional layout of input / output protection devices

This project was initiated for the effective design and layout of input protection devices. Scope of this work includes setting up prototype ESD testing environment, studying the layout of commercial chips and the ESD threshold voltages, then test our own design on the chip fabricated.

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Bibliographic Details
Main Authors: Liu, Po Ching., Siek, Liter.
Other Authors: School of Electrical and Electronic Engineering
Format: Research Report
Published: 2008
Subjects:
DRNTU::Engineering::Electrical and electronic engineering::Electronic apparatus and materials
Online Access:http://hdl.handle.net/10356/2717
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Institution: Nanyang Technological University
id sg-ntu-dr.10356-2717
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spelling sg-ntu-dr.10356-27172023-03-04T03:24:23Z Optional layout of input / output protection devices Liu, Po Ching. Siek, Liter. School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic apparatus and materials This project was initiated for the effective design and layout of input protection devices. Scope of this work includes setting up prototype ESD testing environment, studying the layout of commercial chips and the ESD threshold voltages, then test our own design on the chip fabricated. RP 40/90 2008-09-17T09:13:45Z 2008-09-17T09:13:45Z 2000 2000 Research Report http://hdl.handle.net/10356/2717 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic apparatus and materials
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic apparatus and materials
Liu, Po Ching.
Siek, Liter.
Optional layout of input / output protection devices
description This project was initiated for the effective design and layout of input protection devices. Scope of this work includes setting up prototype ESD testing environment, studying the layout of commercial chips and the ESD threshold voltages, then test our own design on the chip fabricated.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Liu, Po Ching.
Siek, Liter.
format Research Report
author Liu, Po Ching.
Siek, Liter.
author_sort Liu, Po Ching.
title Optional layout of input / output protection devices
title_short Optional layout of input / output protection devices
title_full Optional layout of input / output protection devices
title_fullStr Optional layout of input / output protection devices
title_full_unstemmed Optional layout of input / output protection devices
title_sort optional layout of input / output protection devices
publishDate 2008
url http://hdl.handle.net/10356/2717
_version_ 1759857485478363136

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