Design of 8-bit divider with VHDL language
This project involves the design of 8-bit dividers with VHDL language. We illustrate the modern way of designing logic circuits, using sophisticated computer-aided-design (CAD) software tools.
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| Format: | Theses and Dissertations |
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2008
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| Online Access: | http://hdl.handle.net/10356/3137 |
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| Institution: | Nanyang Technological University |
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sg-ntu-dr.10356-31372023-07-04T16:38:17Z Design of 8-bit divider with VHDL language Phyu Myint Wai. Liu, Po-Ching School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits This project involves the design of 8-bit dividers with VHDL language. We illustrate the modern way of designing logic circuits, using sophisticated computer-aided-design (CAD) software tools. Master of Science (Consumer Electronics) 2008-09-17T09:23:01Z 2008-09-17T09:23:01Z 2002 2002 Thesis http://hdl.handle.net/10356/3137 Nanyang Technological University application/pdf |
| institution |
Nanyang Technological University |
| building |
NTU Library |
| continent |
Asia |
| country |
Singapore Singapore |
| content_provider |
NTU Library |
| collection |
DR-NTU |
| topic |
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits |
| spellingShingle |
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Phyu Myint Wai. Design of 8-bit divider with VHDL language |
| description |
This project involves the design of 8-bit dividers with VHDL language. We illustrate the modern way of designing logic circuits, using sophisticated computer-aided-design (CAD) software tools. |
| author2 |
Liu, Po-Ching |
| author_facet |
Liu, Po-Ching Phyu Myint Wai. |
| format |
Theses and Dissertations |
| author |
Phyu Myint Wai. |
| author_sort |
Phyu Myint Wai. |
| title |
Design of 8-bit divider with VHDL language |
| title_short |
Design of 8-bit divider with VHDL language |
| title_full |
Design of 8-bit divider with VHDL language |
| title_fullStr |
Design of 8-bit divider with VHDL language |
| title_full_unstemmed |
Design of 8-bit divider with VHDL language |
| title_sort |
design of 8-bit divider with vhdl language |
| publishDate |
2008 |
| url |
http://hdl.handle.net/10356/3137 |
| _version_ |
1772826003460063232 |