Design of 8-bit divider with VHDL language

• Main Author: Phyu Myint Wai.
• Other Authors: Liu, Po-Ching
• Format: Theses and Dissertations
• Published: 2008
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• Online Access: http://hdl.handle.net/10356/3137
• Institution: Nanyang Technological University

This project involves the design of 8-bit dividers with VHDL language. We illustrate the modern way of designing logic circuits, using sophisticated computer-aided-design (CAD) software tools.