Design and synthesis of a microprocessor core using VHDL
The objective of this project is to design, develop and implement a general 16-bit microprocessor core that can be embedded into the mixed-signal integrated circuits to control the operation of the circuits.
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| Format: | Theses and Dissertations |
| Published: |
2008
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| Online Access: | http://hdl.handle.net/10356/3739 |
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| Institution: | Nanyang Technological University |