Design and synthesis of a microprocessor core using VHDL
The objective of this project is to design, develop and implement a general 16-bit microprocessor core that can be embedded into the mixed-signal integrated circuits to control the operation of the circuits.
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| Format: | Theses and Dissertations |
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2008
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| Online Access: | http://hdl.handle.net/10356/3739 |
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| Institution: | Nanyang Technological University |
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sg-ntu-dr.10356-37392023-07-04T16:48:44Z Design and synthesis of a microprocessor core using VHDL Wong, Chee Heng. Jong, Ching Chuen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits The objective of this project is to design, develop and implement a general 16-bit microprocessor core that can be embedded into the mixed-signal integrated circuits to control the operation of the circuits. Master of Science (Consumer Electronics) 2008-09-17T09:36:29Z 2008-09-17T09:36:29Z 2001 2001 Thesis http://hdl.handle.net/10356/3739 Nanyang Technological University application/pdf |
| institution |
Nanyang Technological University |
| building |
NTU Library |
| continent |
Asia |
| country |
Singapore Singapore |
| content_provider |
NTU Library |
| collection |
DR-NTU |
| topic |
DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits |
| spellingShingle |
DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits Wong, Chee Heng. Design and synthesis of a microprocessor core using VHDL |
| description |
The objective of this project is to design, develop and implement a general 16-bit microprocessor core that can be embedded into the mixed-signal integrated circuits to control the operation of the circuits. |
| author2 |
Jong, Ching Chuen |
| author_facet |
Jong, Ching Chuen Wong, Chee Heng. |
| format |
Theses and Dissertations |
| author |
Wong, Chee Heng. |
| author_sort |
Wong, Chee Heng. |
| title |
Design and synthesis of a microprocessor core using VHDL |
| title_short |
Design and synthesis of a microprocessor core using VHDL |
| title_full |
Design and synthesis of a microprocessor core using VHDL |
| title_fullStr |
Design and synthesis of a microprocessor core using VHDL |
| title_full_unstemmed |
Design and synthesis of a microprocessor core using VHDL |
| title_sort |
design and synthesis of a microprocessor core using vhdl |
| publishDate |
2008 |
| url |
http://hdl.handle.net/10356/3739 |
| _version_ |
1772825575453360128 |