Design of 8-bit divider with VHDL language
This project involves the design of 8-bit dividers with VHDL language. We illustrate the modern way of designing logic circuits, using sophisticated computer-aided-design (CAD) software tools.
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| Format: | Theses and Dissertations |
| Published: |
2008
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| Online Access: | http://hdl.handle.net/10356/3137 |
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| Institution: | Nanyang Technological University |