Modeling of I2C bus controller using VHDL
This project is aimed to model the I2C (Inter Integrated Circuit) Bus Controller using VHDL. Basically the I2C Bus Controller being modeled consists of two main blocks, that is Micro Controller Interface Module & I2C Interface Module.
Saved in:
Main Author: | Thor, Swee Lin. |
---|---|
Other Authors: | Liu, Po Ching |
Format: | Theses and Dissertations |
Published: |
2008
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/3597 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Similar Items
-
Macromodelling of analogue circuits using VHDL-AMS
by: Su, Latt Mon.
Published: (2008) -
Design of 8-bit divider with VHDL language
by: Phyu Myint Wai.
Published: (2008) -
Design of 4x4 multipliers with VHDL language
by: Troung, Thai Quang.
Published: (2008) -
Design and synthesis of a microprocessor core using VHDL
by: Wong, Chee Heng.
Published: (2008) -
VHDL synthesis of Montgomery modular multiplier
by: Sarasvathi Thangaraju.
Published: (2008)