Development of NTU CMOS process for SiGe BiCMOS technology

Wafer fabrication was completed in the Micro Fabrication laboratory (MFL) on two types of starting substrate. Electrical measurement of the fabricated devices showed that selected parameters in the DOE slightly missed the target values. Based on the electrical measurement results, a new set of param...

Full description

Saved in:
Bibliographic Details
Main Author: Wang, Jianpeng.
Other Authors: Tse, Man Siu
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/3663
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
id sg-ntu-dr.10356-3663
record_format dspace
spelling sg-ntu-dr.10356-36632023-07-04T15:01:12Z Development of NTU CMOS process for SiGe BiCMOS technology Wang, Jianpeng. Tse, Man Siu School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits Wafer fabrication was completed in the Micro Fabrication laboratory (MFL) on two types of starting substrate. Electrical measurement of the fabricated devices showed that selected parameters in the DOE slightly missed the target values. Based on the electrical measurement results, a new set of parameters for DOE is proposed for another round of wafer fabrication. Master of Science (Microelectronics) 2008-09-17T09:34:45Z 2008-09-17T09:34:45Z 2002 2002 Thesis http://hdl.handle.net/10356/3663 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Wang, Jianpeng.
Development of NTU CMOS process for SiGe BiCMOS technology
description Wafer fabrication was completed in the Micro Fabrication laboratory (MFL) on two types of starting substrate. Electrical measurement of the fabricated devices showed that selected parameters in the DOE slightly missed the target values. Based on the electrical measurement results, a new set of parameters for DOE is proposed for another round of wafer fabrication.
author2 Tse, Man Siu
author_facet Tse, Man Siu
Wang, Jianpeng.
format Theses and Dissertations
author Wang, Jianpeng.
author_sort Wang, Jianpeng.
title Development of NTU CMOS process for SiGe BiCMOS technology
title_short Development of NTU CMOS process for SiGe BiCMOS technology
title_full Development of NTU CMOS process for SiGe BiCMOS technology
title_fullStr Development of NTU CMOS process for SiGe BiCMOS technology
title_full_unstemmed Development of NTU CMOS process for SiGe BiCMOS technology
title_sort development of ntu cmos process for sige bicmos technology
publishDate 2008
url http://hdl.handle.net/10356/3663
_version_ 1772825421913522176