Implementation of digital systems on FPGA devices
The objective of the project is to design and synthesize both a master and slave PCI local bus, so that they can be reused if other design requires a PCI bus. The design in this work is based on PCI local bus specification rev 3.0. VERILOG HDL is chosen to implement the design in RTL level. The PCI...
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sg-ntu-dr.10356-37932023-07-04T16:31:55Z Implementation of digital systems on FPGA devices Chen, Lan. Jong, Ching Chuen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems The objective of the project is to design and synthesize both a master and slave PCI local bus, so that they can be reused if other design requires a PCI bus. The design in this work is based on PCI local bus specification rev 3.0. VERILOG HDL is chosen to implement the design in RTL level. The PCI master and PCI slave were separately simulated and verified for read and write operation using XILINXISE web pack. The two modules were then successfully integrated. The integration was also simulated and verified. Finally, the design was synthesized to XILINX Virtex-4 FPGA. And the synthesis result shows that the PCI speed required (66Mhz) in the specification is well satisfied. Master of Science (Integrated Circuit Design) 2008-09-17T09:37:40Z 2008-09-17T09:37:40Z 2006 2006 Thesis http://hdl.handle.net/10356/3793 Nanyang Technological University application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems Chen, Lan. Implementation of digital systems on FPGA devices |
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The objective of the project is to design and synthesize both a master and slave PCI local bus, so that they can be reused if other design requires a PCI bus. The design in this work is based on PCI local bus specification rev 3.0. VERILOG HDL is chosen to implement the design in RTL level. The PCI master and PCI slave were separately simulated and verified for read and write operation using XILINXISE web pack. The two modules were then successfully integrated. The integration was also simulated and verified. Finally, the design was synthesized to XILINX Virtex-4 FPGA. And the synthesis result shows that the PCI speed required (66Mhz) in the specification is well satisfied. |
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Jong, Ching Chuen |
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Jong, Ching Chuen Chen, Lan. |
format |
Theses and Dissertations |
author |
Chen, Lan. |
author_sort |
Chen, Lan. |
title |
Implementation of digital systems on FPGA devices |
title_short |
Implementation of digital systems on FPGA devices |
title_full |
Implementation of digital systems on FPGA devices |
title_fullStr |
Implementation of digital systems on FPGA devices |
title_full_unstemmed |
Implementation of digital systems on FPGA devices |
title_sort |
implementation of digital systems on fpga devices |
publishDate |
2008 |
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http://hdl.handle.net/10356/3793 |
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1772828064231718912 |