Clock and data recovery circuits
110 p.
Saved in:
Main Author: | |
---|---|
Other Authors: | |
Format: | Theses and Dissertations |
Published: |
2010
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/39138 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
id |
sg-ntu-dr.10356-39138 |
---|---|
record_format |
dspace |
spelling |
sg-ntu-dr.10356-391382023-07-04T15:29:41Z Clock and data recovery circuits Adaikkalam Raguraman Ng Lian Soon School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits 110 p. Clock and data recovery circuits (CDRs) have been extensively used in data communication systems. The main task of the CDR circuits in communication systems is to extract the clock from the noisy data and fulfill the recovery of the original data. The recovered data and clock must exhibit low noise and small jitter characteristics for further processing. Master of Science (Integrated Circuit Design) 2010-05-21T04:45:24Z 2010-05-21T04:45:24Z 2007 2007 Thesis http://hdl.handle.net/10356/39138 application/pdf |
institution |
Nanyang Technological University |
building |
NTU Library |
continent |
Asia |
country |
Singapore Singapore |
content_provider |
NTU Library |
collection |
DR-NTU |
topic |
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits |
spellingShingle |
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Adaikkalam Raguraman Clock and data recovery circuits |
description |
110 p. |
author2 |
Ng Lian Soon |
author_facet |
Ng Lian Soon Adaikkalam Raguraman |
format |
Theses and Dissertations |
author |
Adaikkalam Raguraman |
author_sort |
Adaikkalam Raguraman |
title |
Clock and data recovery circuits |
title_short |
Clock and data recovery circuits |
title_full |
Clock and data recovery circuits |
title_fullStr |
Clock and data recovery circuits |
title_full_unstemmed |
Clock and data recovery circuits |
title_sort |
clock and data recovery circuits |
publishDate |
2010 |
url |
http://hdl.handle.net/10356/39138 |
_version_ |
1772826804650770432 |