Low power low voltage adder cells for digital multiplier
As battery operated devices prevail, power consumption in digital signal processor has emerged as an increasingly critical design constraint in addition to the pursuit of timing closure and area efficiency. Addition and multiplication, being the fundamental arithmetic operations in digital signal pr...
Saved in:
Main Author: | |
---|---|
Other Authors: | |
Format: | Theses and Dissertations |
Published: |
2008
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/3990 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |