Electrical characterization of Si Nanowire based devices – transistors and SONOS memory

• Main Author: Xiong, Tian Zhong.
• Other Authors: Yu Hongyu
• Format: Final Year Project
• Language: English
• Published: 2010
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
• Online Access: http://hdl.handle.net/10356/40239
• Institution: Nanyang Technological University

A vertical gate-all-around (GAA) non-volatile memory (NVM) SONOS and PMOS vertical gate-all-around (GAA) Silicon Nanowire with the height of 150nm and diameter of ~20nm for the memory and height of 600~700nm and diameter of ~5nm is being study. In this work, the main aim is to find out the electrical characteristic of both devices. Results has shown that the SONOS memory has much enhanced P/E speed, which can be explained by the augment of electric-field across the tunneling dielectrics near the silicon core-channel due to the scaled dimension as well as the smaller radius of curvatures at the four corners of the wire with highly scaled squarish SiNW channel. With fast P/E speed, large window under low voltage, good data and retention, non-volatile (NVM) SONOS memory will be a promising candidate for further flash memory application. As for PMOS vertical gate-all-around (GAA) Silicon Nanowire, results show that with the greatly decrease in the scalability of the transistor for SNWFETs NBTI degradation is not significant in test results due to the ultra small surface area of the SNWFETs, but it can be sure that from past study the scalability will contribute in NBTI degradation thus more study must be research in this area.