Digital system design with FPGA using verilog HDL

• المؤلف الرئيسي: Cho, Shao Ying.
• مؤلفون آخرون: Jong Ching Chuen
• التنسيق: Final Year Project
• اللغة: English
• منشور في: 2011
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/42749
• المؤسسة: Nanyang Technological University

In this final year project (Digital system design with FPGA using Verilog HDL) CORDIC is selected as the digital system to be designed. CORDIC is a simple and yet efficient algorithm for computing the hyperbolic and trigonometric functions, without the need of complex hardware multipliers and div...