Development of a software program for module allocation and interconnection optimisation in high-level synthesis of VLSI systems

• المؤلف الرئيسي: Goo, Chong Kiat.
• مؤلفون آخرون: Jong, Ching Chuen
• التنسيق: Theses and Dissertations
• منشور في: 2008
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/4307

The objective of this project is to search for a new algorithm to solve the module allocation and interconnection problems. Current algorithms and techniques were studied and a new technique was developed and implemented.