Development of a software program for module allocation and interconnection optimisation in high-level synthesis of VLSI systems
The objective of this project is to search for a new algorithm to solve the module allocation and interconnection problems. Current algorithms and techniques were studied and a new technique was developed and implemented.
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| 格式: | Theses and Dissertations |
| 出版: |
2008
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| 在線閱讀: | http://hdl.handle.net/10356/4307 |
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