Design automation for a 2 uM double-metal CMOS gate array
143 p.
Saved in:
Main Author: | |
---|---|
Other Authors: | |
Format: | Research Report |
Published: |
2011
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/46617 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |