Design of a low-power asynchronous multiplier

This thesis pertains to design and analysis of a 16-bit low-voltage (1.1 V) low-power asynchronous parallel multiplier targeted for a low-power asynchronous digital signal processor.

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Bibliographic Details
Main Author: Lim, Khoon Aun.
Other Authors: Gwee, Bah Hwee
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/4672
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-46722023-07-04T15:53:21Z Design of a low-power asynchronous multiplier Lim, Khoon Aun. Gwee, Bah Hwee School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits This thesis pertains to design and analysis of a 16-bit low-voltage (1.1 V) low-power asynchronous parallel multiplier targeted for a low-power asynchronous digital signal processor. Master of Science (Integrated Circuit Design) 2008-09-17T09:56:19Z 2008-09-17T09:56:19Z 2003 2003 Thesis http://hdl.handle.net/10356/4672 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Lim, Khoon Aun.
Design of a low-power asynchronous multiplier
description This thesis pertains to design and analysis of a 16-bit low-voltage (1.1 V) low-power asynchronous parallel multiplier targeted for a low-power asynchronous digital signal processor.
author2 Gwee, Bah Hwee
author_facet Gwee, Bah Hwee
Lim, Khoon Aun.
format Theses and Dissertations
author Lim, Khoon Aun.
author_sort Lim, Khoon Aun.
title Design of a low-power asynchronous multiplier
title_short Design of a low-power asynchronous multiplier
title_full Design of a low-power asynchronous multiplier
title_fullStr Design of a low-power asynchronous multiplier
title_full_unstemmed Design of a low-power asynchronous multiplier
title_sort design of a low-power asynchronous multiplier
publishDate 2008
url http://hdl.handle.net/10356/4672
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