Electrical characterization of the novel vertical slit field-effect transistor (VeSFET)

• Main Author: Tung, Zhi Yan.
• Other Authors: Ang Diing Shenp
• Format: Final Year Project
• Language: English
• Published: 2012
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electric power
• Online Access: http://hdl.handle.net/10356/50177
• Institution: Nanyang Technological University

A junctionless Vertical Slit Field-Effect Transistor (VeSFET) fabricated on SOI wafer using conventional CMOS process was proposed by W. Maly, et al.[1]. This new architecture device has two symmetrical independent gates with a three-dimensional channel. This device structure is to overcome the chal...