Back-end-of-line process reliability of advanced semiconductor technology
The main objectives of this project are (1) to establish new test procedures for accurate wafer-level characterization of Cu electromigration behavior and low-k dielectric materials, (2) to measure the wafer-level Cu electromigration characteristics and explain them in terms of microstructural chang...
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sg-ntu-dr.10356-50362023-07-08T06:39:21Z Back-end-of-line process reliability of advanced semiconductor technology Park, Hun Sub. School of Materials Science & Engineering DRNTU::Engineering::Materials::Microelectronics and semiconductor materials::Nanoelectronics and interconnects The main objectives of this project are (1) to establish new test procedures for accurate wafer-level characterization of Cu electromigration behavior and low-k dielectric materials, (2) to measure the wafer-level Cu electromigration characteristics and explain them in terms of microstructural change and interfacial phenomena. The effect of copper metal lines on the device lifetime has been studied from the materials engineering point of view, (3) to study how to correlate the wafer-level reliability data with the product reliability. The wafer-level electromigration test results should be consistent with the package-level results, (4) to fully characterize a new low-k dielectric material (Black-diamond) and its influence on the electromigration reliability of the copper metal lines, (5) to identify issues arising in the integration of the backend processes, (6) to propose ideas of how to resolve integration issues resulting from the new low-k dielectric and investigate its applicability to advanced technologies. 2008-09-17T10:05:02Z 2008-09-17T10:05:02Z 2005 2005 Research Report http://hdl.handle.net/10356/5036 en Nanyang Technological University 140 p. application/pdf |
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DRNTU::Engineering::Materials::Microelectronics and semiconductor materials::Nanoelectronics and interconnects Park, Hun Sub. Back-end-of-line process reliability of advanced semiconductor technology |
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The main objectives of this project are (1) to establish new test procedures for accurate wafer-level characterization of Cu electromigration behavior and low-k dielectric materials, (2) to measure the wafer-level Cu electromigration characteristics and explain them in terms of microstructural change and interfacial phenomena. The effect of copper metal lines on the device lifetime has been studied from the materials engineering point of view, (3) to study how to correlate the wafer-level reliability data with the product reliability. The wafer-level electromigration test results should be consistent with the package-level results, (4) to fully characterize a new low-k dielectric material (Black-diamond) and its influence on the electromigration reliability of the copper metal lines, (5) to identify issues arising in the integration of the backend processes, (6) to propose ideas of how to resolve integration issues resulting from the new low-k dielectric and investigate its applicability to advanced technologies. |
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School of Materials Science & Engineering |
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School of Materials Science & Engineering Park, Hun Sub. |
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Research Report |
author |
Park, Hun Sub. |
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Park, Hun Sub. |
title |
Back-end-of-line process reliability of advanced semiconductor technology |
title_short |
Back-end-of-line process reliability of advanced semiconductor technology |
title_full |
Back-end-of-line process reliability of advanced semiconductor technology |
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Back-end-of-line process reliability of advanced semiconductor technology |
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Back-end-of-line process reliability of advanced semiconductor technology |
title_sort |
back-end-of-line process reliability of advanced semiconductor technology |
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2008 |
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http://hdl.handle.net/10356/5036 |
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1772825967130050560 |