All MOS low-power low-voltage LDO with an embedded voltage reference
A low dropout (LDO) voltage regulator with embedded voltage reference (EVR) where all MOSFETs are biased in weak inversion (sub-threshold region) except the pass transistor, generating a mean regulated voltage of 620.3 mV at full load (10 mA) under 1.2-V supply voltage, has been designed and simulat...
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| Format: | Final Year Project |
| Language: | English |
| Published: |
2015
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| Subjects: | |
| Online Access: | http://hdl.handle.net/10356/64618 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | A low dropout (LDO) voltage regulator with embedded voltage reference (EVR) where all MOSFETs are biased in weak inversion (sub-threshold region) except the pass transistor, generating a mean regulated voltage of 620.3 mV at full load (10 mA) under 1.2-V supply voltage, has been designed and simulated. Precise sub-threshold design allows the circuit to operate at room temperature with supply voltage down to 0.85 V and current consumption of 7 uA. Measurements performed over a number of 500 samples using Monte Carlo simulations showed an average TC of 24.35 ppm/degree C with 3-sigma of 29.26 ppm/degree C over the temperature range from 0 degree C to 85 degree C. The line regulation is 4.30 mV/V. The PSRR measured at 50 Hz is –47.53 dB. |
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