All MOS low-power low-voltage LDO with an embedded voltage reference
A low dropout (LDO) voltage regulator with embedded voltage reference (EVR) where all MOSFETs are biased in weak inversion (sub-threshold region) except the pass transistor, generating a mean regulated voltage of 620.3 mV at full load (10 mA) under 1.2-V supply voltage, has been designed and simulat...
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sg-ntu-dr.10356-646182023-07-07T16:11:13Z All MOS low-power low-voltage LDO with an embedded voltage reference Chor, Chee Yong Siek Liter School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering A low dropout (LDO) voltage regulator with embedded voltage reference (EVR) where all MOSFETs are biased in weak inversion (sub-threshold region) except the pass transistor, generating a mean regulated voltage of 620.3 mV at full load (10 mA) under 1.2-V supply voltage, has been designed and simulated. Precise sub-threshold design allows the circuit to operate at room temperature with supply voltage down to 0.85 V and current consumption of 7 uA. Measurements performed over a number of 500 samples using Monte Carlo simulations showed an average TC of 24.35 ppm/degree C with 3-sigma of 29.26 ppm/degree C over the temperature range from 0 degree C to 85 degree C. The line regulation is 4.30 mV/V. The PSRR measured at 50 Hz is –47.53 dB. Bachelor of Engineering 2015-05-29T01:40:14Z 2015-05-29T01:40:14Z 2015 2015 Final Year Project (FYP) http://hdl.handle.net/10356/64618 en Nanyang Technological University 75 p. application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering Chor, Chee Yong All MOS low-power low-voltage LDO with an embedded voltage reference |
| description |
A low dropout (LDO) voltage regulator with embedded voltage reference (EVR) where all MOSFETs are biased in weak inversion (sub-threshold region) except the pass transistor, generating a mean regulated voltage of 620.3 mV at full load (10 mA) under 1.2-V supply voltage, has been designed and simulated. Precise sub-threshold design allows the circuit to operate at room temperature with supply voltage down to 0.85 V and current consumption of 7 uA. Measurements performed over a number of 500 samples using Monte Carlo simulations showed an average TC of 24.35 ppm/degree C with 3-sigma of 29.26 ppm/degree C over the temperature range from 0 degree C to 85 degree C. The line regulation is 4.30 mV/V. The PSRR measured at 50 Hz is –47.53 dB. |
| author2 |
Siek Liter |
| author_facet |
Siek Liter Chor, Chee Yong |
| format |
Final Year Project |
| author |
Chor, Chee Yong |
| author_sort |
Chor, Chee Yong |
| title |
All MOS low-power low-voltage LDO with an embedded voltage reference |
| title_short |
All MOS low-power low-voltage LDO with an embedded voltage reference |
| title_full |
All MOS low-power low-voltage LDO with an embedded voltage reference |
| title_fullStr |
All MOS low-power low-voltage LDO with an embedded voltage reference |
| title_full_unstemmed |
All MOS low-power low-voltage LDO with an embedded voltage reference |
| title_sort |
all mos low-power low-voltage ldo with an embedded voltage reference |
| publishDate |
2015 |
| url |
http://hdl.handle.net/10356/64618 |
| _version_ |
1772829173559066624 |