Developing secure, ultra-low power RISC processor
General purpose Reduced Instruction Set Computing (RISC) processors are widely used while software applications are interacting with the Operating System (OS) to handle jobs, the OS communicate with the processor to complete the jobs with the help of accelerators. The goal of this project is to impr...
Saved in:
Main Author: | Lim, Jun Hao |
---|---|
Other Authors: | Anupam Chattopadhyay |
Format: | Final Year Project |
Language: | English |
Published: |
2017
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/70190 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
Developing secure, ultra-low power RISC processor
by: Ang, Kai Jun
Published: (2023) -
A Web/Java simulator for RISC processor
by: Ang, Rachel Sue Cheng
Published: (2023) -
RISC-V processor FPGA implementation
by: Tey, Jing Kai
Published: (2024) -
Radiation hardened RISC-V processor
by: Gu, Haoteng
Published: (2022) -
Designs and implementations of ultra-low power, low voltage digital signal processors
by: Ngoc, Le Ba
Published: (2018)