A 40nm CMOS current reference with reduced PVT sensitivity
A reference current is a vital building block for an analog circuit. Most often, the current reference determines the biasing point of the circuits, thereby influencing the ultimate performance of the circuitries. In this work, an improved foundation current reference with dynamic element matching (...
Saved in:
Main Author: | |
---|---|
Other Authors: | |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2018
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/73108 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Be the first to leave a comment!