A very-low dropout regulator

The design and simulation of a low-dropout regulator (LDO) with a dynamic biasing circuit, which is used to improve transient response, closed-loop bandwidth and loop gain, is presented in this report. With additional quiescent current utilized by dynamic biasing circuit, the primary LDO achieves fa...

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Bibliographic Details
Main Author: Aung Phyoe Htut
Other Authors: Chan Pak Kwong
Format: Final Year Project
Language:English
Published: 2018
Subjects:
Online Access:http://hdl.handle.net/10356/74615
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Institution: Nanyang Technological University
Language: English