A very-low dropout regulator
The design and simulation of a low-dropout regulator (LDO) with a dynamic biasing circuit, which is used to improve transient response, closed-loop bandwidth and loop gain, is presented in this report. With additional quiescent current utilized by dynamic biasing circuit, the primary LDO achieves fa...
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| 主要作者: | |
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| 格式: | Final Year Project |
| 語言: | English |
| 出版: |
2018
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| 主題: | |
| 在線閱讀: | http://hdl.handle.net/10356/74615 |
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| 機構: | Nanyang Technological University |
| 語言: | English |