Design of a 5-ary 1-cube torus network-on-chip

A one-dimensional torus network-on-chip with five switching nodes, which can also be named as 5-ary 1-cube torus, has been designed. The routers in the network can tackle input flow control digits (flits) from three different directions at the same time. In the case of dealing with short messages,...

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Main Author: Xing, Cong
Other Authors: Chang Chip Hong
Format: Theses and Dissertations
Language:English
Published: 2018
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Online Access:http://hdl.handle.net/10356/76072
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-760722023-07-04T15:39:58Z Design of a 5-ary 1-cube torus network-on-chip Xing, Cong Chang Chip Hong School of Electrical and Electronic Engineering Technical University of Munich DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits A one-dimensional torus network-on-chip with five switching nodes, which can also be named as 5-ary 1-cube torus, has been designed. The routers in the network can tackle input flow control digits (flits) from three different directions at the same time. In the case of dealing with short messages, round robin protocol is adopted in the input module of the router. Since the data can be transmitted within on cycle, the arbitration scheme is executed on a cycle-by-cycle basis. However, for the transmission of long messages, consecutive cycles are required. Moreover, the transmission process must not be interrupted. Thus, the Grant-Hold circuitry is come up with to guarantee the uninterrupted transmission. When the chosen flit enters and arrives at the output of the switching node, the routing algorithm, which ensures the minimum traversal path, is invoked to determine the output direction taken by the outgoing flit. Consequently, the functionality of bidirectional flits transport has been achieved. In addition, the fabrics of the network are described by Verilog HDL, and the correctness of the network-on-chip as well as the submodules has been verified by corresponding test benches. Keywords: torus network-on-chip, router, Round Robin, Grant-Hold, routing algorithm, bidirectional Master of Science (Integrated Circuit Design) 2018-10-22T13:37:46Z 2018-10-22T13:37:46Z 2018 Thesis http://hdl.handle.net/10356/76072 en 76 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Xing, Cong
Design of a 5-ary 1-cube torus network-on-chip
description A one-dimensional torus network-on-chip with five switching nodes, which can also be named as 5-ary 1-cube torus, has been designed. The routers in the network can tackle input flow control digits (flits) from three different directions at the same time. In the case of dealing with short messages, round robin protocol is adopted in the input module of the router. Since the data can be transmitted within on cycle, the arbitration scheme is executed on a cycle-by-cycle basis. However, for the transmission of long messages, consecutive cycles are required. Moreover, the transmission process must not be interrupted. Thus, the Grant-Hold circuitry is come up with to guarantee the uninterrupted transmission. When the chosen flit enters and arrives at the output of the switching node, the routing algorithm, which ensures the minimum traversal path, is invoked to determine the output direction taken by the outgoing flit. Consequently, the functionality of bidirectional flits transport has been achieved. In addition, the fabrics of the network are described by Verilog HDL, and the correctness of the network-on-chip as well as the submodules has been verified by corresponding test benches. Keywords: torus network-on-chip, router, Round Robin, Grant-Hold, routing algorithm, bidirectional
author2 Chang Chip Hong
author_facet Chang Chip Hong
Xing, Cong
format Theses and Dissertations
author Xing, Cong
author_sort Xing, Cong
title Design of a 5-ary 1-cube torus network-on-chip
title_short Design of a 5-ary 1-cube torus network-on-chip
title_full Design of a 5-ary 1-cube torus network-on-chip
title_fullStr Design of a 5-ary 1-cube torus network-on-chip
title_full_unstemmed Design of a 5-ary 1-cube torus network-on-chip
title_sort design of a 5-ary 1-cube torus network-on-chip
publishDate 2018
url http://hdl.handle.net/10356/76072
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