Custom FPGA-based soft-processors for sparse graph acceleration

• 主要作者: Kapre, Nachiket
• 其他作者: School of Computer Engineering
• 格式: Conference or Workshop Item
• 語言: English
• 出版: 2015
• 主題: Computer Science and Engineering
• 在線閱讀: https://hdl.handle.net/10356/81243; http://hdl.handle.net/10220/39162
• 機構: Nanyang Technological University

FPGA-based soft processors customized for operations on sparse graphs can deliver significant performance improvements over conventional organizations (ARMv7 CPUs) for bulk synchronous sparse graph algorithms. We develop a stripped-down soft processor ISA to implement specific repetitive operations...