Extensive Laser Fault Injection Profiling of 65 nm FPGA

• Main Authors: Breier, Jakub, He, Wei, Bhasin, Shivam, Jap, Dirmanto, Chef, Samuel, Ong, Hock Guan, Gan, Chee Lip
• 其他作者: School of Materials Science & Engineering
• 格式: Article
• 語言: English
• 出版: 2018
• 主題: Cryptographic Fault Attack; Laser Fault Injection
• 在線閱讀: https://hdl.handle.net/10356/88764; http://hdl.handle.net/10220/44737
• 機構: Nanyang Technological University

Fault injection attacks have been widely investigated in both academia and industry during the past decade. In this attack approach, the adversary intentionally induces computational faults in the security components of the integrated circuit (IC) for deducing the confidential information processed or stored inside the device. However, the internal architecture of real-world devices is typically unknown to the attacker and the insufficient information about the device internals often cannot satisfy requirements of a practical fault injection attack. In this paper, we target Field Programmable Gate Array (FPGA) that is widely used in hardware security applications. By analyzing the faulty outputs of implemented algorithms, the scale of logic arrays and the sensitive logic cells can be precisely profiled. Using the outcome of this work, practical attacks can be significantly accelerated, without a need of time-consuming chip-scale injection scan. In addition, the observed fault models are compatible with most of the previously proposed fault models for differential or algebraic fault attacks (DFA/AFA). Moreover, a low-cost and highly sensitive logic-level countermeasure for predicting the laser fault injection attempt is described, which can be applied into any digital IC with a minimal overhead.