Design of SPST/SPDT switches in 65nm CMOS for 60GHz applications

• Main Authors: He, Jin, Zhang, Yue Ping
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Conference or Workshop Item
• 語言: English
• 出版: 2010
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Electronic apparatus and materials
• 在線閱讀: https://hdl.handle.net/10356/90592; http://hdl.handle.net/10220/6346

This paper presents novel single-pole-single-throw (SPST) and single-pole-double-throw (SPDT) switches for 57-66GHz band applications. At 60GHz band, the SPST switch exhibits an insertion loss of 1.6dB, a return loss of 16dB, an isolation of 27dB and an input 1-dB compression point (IP1dB) of 11dBm; Correspondingly, the SPDT switch achieves an insertion loss of 3dB/2.5dB, a return loss of 12.5dB/12dB, an isolation of 22dB/22dB and an input P1dB of 12dBm/13dBm in the Tx/Rx mode, respectively. The switches are designed and implemented with STMicroelectronics 1.2V 65nm CMOS RF process.