Improved pentacene device characteristics with sol–gel SiO2 dielectric films

• Main Authors: Cahyadi, Tommy, Tan, H. S., Namdas, E. B., Mhaisalkar, Subodh Gautam, Lee, Pooi See, Chen, Z. K., Ng, C. M., Boey, Freddy Yin Chiang
• Other Authors: School of Materials Science & Engineering
• Format: Article
• Language: English
• Published: 2013
• Subjects: DRNTU::Engineering::Materials::Microelectronics and semiconductor materials::Thin films
• Online Access: https://hdl.handle.net/10356/97335; http://hdl.handle.net/10220/10486
• Institution: Nanyang Technological University

The interfacial interactions between semiconductors and gate dielectrics have a profound influence on the device characteristics of field effect transistors (FETs). This paper reports on the concept of introducing a sol–gel SiO2 as inorganic capping layer to significantly improve device characteristics of pentacene-based FETs. The smoother film surfaces of sol–gel SiO2 (1.9 Å root-mean-square) induced larger pentacene grain sizes, and led to hole mobilities of 1.43 cm2/Vs, on–off ratio of 107, and a subthreshold swing of 102 mV/decade when operating at −20 V.