A PAE of 17.5% Ka-band balanced frequency doubler with conversion gain of 20 dB
A frequency doubler from 27 to 41 GHz fabricated in 0.13-μm SiGe BiCMOS technology with a maximum output power of 8 dBm and a power added efficiency (PAE) of 17.5% at dc power consumption of 35 mW is presented. It consists of a balun, a driver amplifier (DA), a common-base (CB) core and a medium pow...
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| Main Authors: | , , , , , , |
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| Other Authors: | |
| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2013
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/97923 http://hdl.handle.net/10220/13233 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | A frequency doubler from 27 to 41 GHz fabricated in 0.13-μm SiGe BiCMOS technology with a maximum output power of 8 dBm and a power added efficiency (PAE) of 17.5% at dc power consumption of 35 mW is presented. It consists of a balun, a driver amplifier (DA), a common-base (CB) core and a medium power amplifier. The CB topology with balun is designed for wider bandwidth and better matching. The measured results showed that the doubler presents a gain of 16.8-19.8 dB, an output power of 1.3-4.3 dBm, and a fundamental rejection of better than 25.7 dB from 27 to 41 GHz with -15.5 dBm input power. The chip size is 0.75 × 0.45 mm2. |
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