Rapid memory-aware selection of hardware accelerators in programmable SoC design

Rapid memory-aware selection of hardware accelerators in programmable SoC design

Programmable Systems-on-Chips (SoCs) are expected to incorporate a larger number of application-specific hardware accelerators with tightly integrated memories in order to meet stringent performance-power requirements of embedded systems. As data sharing between the accelerator memories and the proc...

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Bibliographic Details
Main Authors: Prakash, Alok, Clarke, Christopher T., Lam, Siew-Kei, Srikanthan, Thambipillai
Other Authors: School of Computer Science and Engineering
Format: Article
Language:English
Published: 2019
Subjects:
Accelerator Architectures
DRNTU::Engineering::Computer science and engineering
Memory Management
Online Access:https://hdl.handle.net/10356/99051
http://hdl.handle.net/10220/48550
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Institution: Nanyang Technological University
Language: English

Internet

https://hdl.handle.net/10356/99051
http://hdl.handle.net/10220/48550

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