Rapid memory-aware selection of hardware accelerators in programmable SoC design
Programmable Systems-on-Chips (SoCs) are expected to incorporate a larger number of application-specific hardware accelerators with tightly integrated memories in order to meet stringent performance-power requirements of embedded systems. As data sharing between the accelerator memories and the proc...
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| Main Authors: | , , , |
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| Other Authors: | |
| Format: | Article |
| Language: | English |
| Published: |
2019
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/99051 http://hdl.handle.net/10220/48550 |
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| Institution: | Nanyang Technological University |
| Language: | English |