High-Density and Robust STT-MRAM Array Through Device/Circuit/Architecture Interactions

High-Density and Robust STT-MRAM Array Through Device/Circuit/Architecture Interactions

10.1109/TNANO.2015.2456510

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Bibliographic Details
Main Authors:	Kwon, Kon-Woo, Fong, Xuanyao, Wijesinghe, Parami, Panda, Priyadarshini, Roy, Kaushik
Other Authors:	DEPT OF ELECTRICAL & COMPUTER ENGG
Format:	Article
Language:	English
Published:	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC 2019
Subjects:	Science & Technology Technology Physical Sciences Engineering, Electrical & Electronic Nanoscience & Nanotechnology Materials Science, Multidisciplinary Physics, Applied Engineering Science & Technology - Other Topics Materials Science Physics Cache density error correcting code invert coding magnetic tunnel junction (MTJ) process variation spin transfer torque magnetic random access memory (STT-MRAM) thermal stability factor yield SPIN TRANSFER ANISOTROPY MAGNETORESISTANCE INPLANE CACHE POWER RAM
Online Access:	https://scholarbank.nus.edu.sg/handle/10635/156178
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Institution:	National University of Singapore
Language:	English

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Summary:	10.1109/TNANO.2015.2456510