A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks

10.1109/ISCAS.2016.7527390

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Bibliographic Details
Main Authors:	Narasimman, Govind, Roy, Subhrajit, Fong, Xuanyao, Roy, Kaushik, Chang, Chip-Hong, Basu, Arindam
Other Authors:	ELECTRICAL AND COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	IEEE 2019
Subjects:	Science & Technology Technology Engineering, Electrical & Electronic Engineering PLASTICITY
Online Access:	https://scholarbank.nus.edu.sg/handle/10635/156200
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-156200
record_format	dspace
spelling	sg-nus-scholar.10635-1562002024-04-16T12:16:33Z A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks Narasimman, Govind Roy, Subhrajit Fong, Xuanyao Roy, Kaushik Chang, Chip-Hong Basu, Arindam ELECTRICAL AND COMPUTER ENGINEERING Science & Technology Technology Engineering, Electrical & Electronic Engineering PLASTICITY 10.1109/ISCAS.2016.7527390 IEEE International Symposium on Circuits and Systems (ISCAS) 2016-July 914-917 2019-07-03T03:52:31Z 2019-07-03T03:52:31Z 2016-01-01 2019-07-03T03:41:15Z Conference Paper Narasimman, Govind, Roy, Subhrajit, Fong, Xuanyao, Roy, Kaushik, Chang, Chip-Hong, Basu, Arindam (2016-01-01). A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks. IEEE International Symposium on Circuits and Systems (ISCAS) 2016-July : 914-917. ScholarBank@NUS Repository. https://doi.org/10.1109/ISCAS.2016.7527390 9781479953400 0271-4302 https://scholarbank.nus.edu.sg/handle/10635/156200 IEEE Elements
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
topic	Science & Technology Technology Engineering, Electrical & Electronic Engineering PLASTICITY
spellingShingle	Science & Technology Technology Engineering, Electrical & Electronic Engineering PLASTICITY Narasimman, Govind Roy, Subhrajit Fong, Xuanyao Roy, Kaushik Chang, Chip-Hong Basu, Arindam A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks
description	10.1109/ISCAS.2016.7527390
author2	ELECTRICAL AND COMPUTER ENGINEERING
author_facet	ELECTRICAL AND COMPUTER ENGINEERING Narasimman, Govind Roy, Subhrajit Fong, Xuanyao Roy, Kaushik Chang, Chip-Hong Basu, Arindam
format	Conference or Workshop Item
author	Narasimman, Govind Roy, Subhrajit Fong, Xuanyao Roy, Kaushik Chang, Chip-Hong Basu, Arindam
author_sort	Narasimman, Govind
title	A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks
title_short	A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks
title_full	A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks
title_fullStr	A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks
title_full_unstemmed	A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks
title_sort	low-voltage, low power stdp synapse implementation using domain-wall magnets for spiking neural networks
publisher	IEEE
publishDate	2019
url	https://scholarbank.nus.edu.sg/handle/10635/156200
_version_	1800913647185166336

A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks

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