Compliant Chip-to-Package Interconnects for Wafer Level Packaging

Ph.D

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Bibliographic Details
Main Author:	LIAO EBIN
Other Authors:	MECHANICAL ENGINEERING
Format:	Theses and Dissertations
Language:	English
Published:	2011
Subjects:	compliant interconnects, wafer level packaging, multi-copper-column interconnects, planar microspring interconnects, thermomechanical reliability
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/27835
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Institution:	National University of Singapore
Language:	English

id	sg-nus-scholar.10635-27835
record_format	dspace
spelling	sg-nus-scholar.10635-278352015-01-16T23:31:15Z Compliant Chip-to-Package Interconnects for Wafer Level Packaging LIAO EBIN MECHANICAL ENGINEERING TAY AH ONG, ANDREW compliant interconnects, wafer level packaging, multi-copper-column interconnects, planar microspring interconnects, thermomechanical reliability Ph.D DOCTOR OF PHILOSOPHY 2011-10-18T18:01:54Z 2011-10-18T18:01:54Z 2008-03-20 Thesis LIAO EBIN (2008-03-20). Compliant Chip-to-Package Interconnects for Wafer Level Packaging. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/27835 NOT_IN_WOS en
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
language	English
topic	compliant interconnects, wafer level packaging, multi-copper-column interconnects, planar microspring interconnects, thermomechanical reliability
spellingShingle	compliant interconnects, wafer level packaging, multi-copper-column interconnects, planar microspring interconnects, thermomechanical reliability LIAO EBIN Compliant Chip-to-Package Interconnects for Wafer Level Packaging
description	Ph.D
author2	MECHANICAL ENGINEERING
author_facet	MECHANICAL ENGINEERING LIAO EBIN
format	Theses and Dissertations
author	LIAO EBIN
author_sort	LIAO EBIN
title	Compliant Chip-to-Package Interconnects for Wafer Level Packaging
title_short	Compliant Chip-to-Package Interconnects for Wafer Level Packaging
title_full	Compliant Chip-to-Package Interconnects for Wafer Level Packaging
title_fullStr	Compliant Chip-to-Package Interconnects for Wafer Level Packaging
title_full_unstemmed	Compliant Chip-to-Package Interconnects for Wafer Level Packaging
title_sort	compliant chip-to-package interconnects for wafer level packaging
publishDate	2011
url	http://scholarbank.nus.edu.sg/handle/10635/27835
_version_	1681080630086991872

Compliant Chip-to-Package Interconnects for Wafer Level Packaging

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