A low-power Low-VDD nonvolatile latch using spin transfer torque MRAM

A low-power Low-VDD nonvolatile latch using spin transfer torque MRAM

10.1109/TNANO.2013.2280338

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Bibliographic Details
Main Authors: Huang, K., Lian, Y.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Article
Published: 2014
Subjects:
Low power
Nonvolatile flip-flop (nvFF)
Nonvolatile latch (nvLatch)
Nonvolatile memory (NVM)
Spin-torque transfer MRAM (STT-MRAM)
Two-phase write approach
Online Access:http://scholarbank.nus.edu.sg/handle/10635/54321
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Institution: National University of Singapore
Description
Summary:10.1109/TNANO.2013.2280338

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