A New Model for the Post-Stress Interface Trap Generation in Hot-Carrier Stressed P-MOSFET's

A New Model for the Post-Stress Interface Trap Generation in Hot-Carrier Stressed P-MOSFET's

10.1109/55.748912

Saved in:
Bibliographic Details
Main Authors: Ang, D.S., Ling, C.H.
Other Authors: ELECTRICAL ENGINEERING
Format: Article
Published: 2014
Subjects:
Electron traps
Hot-carrier degradation
MOSFET's
Post-stress interface trap generation
Online Access:http://scholarbank.nus.edu.sg/handle/10635/80278
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: National University of Singapore

Internet

http://scholarbank.nus.edu.sg/handle/10635/80278

Similar Items