MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits
Electronics Letters
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| Main Authors: | , |
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| Other Authors: | |
| Format: | Article |
| Published: |
2014
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| Subjects: | |
| Online Access: | http://scholarbank.nus.edu.sg/handle/10635/80755 |
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| Institution: | National University of Singapore |
| Summary: | Electronics Letters |
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