MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits

MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits

Electronics Letters

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Bibliographic Details
Main Authors:	Samudra, G., Lee, T.K.
Other Authors:	ELECTRICAL ENGINEERING
Format:	Article
Published:	2014
Subjects:	CMOS integrated circuits Semiconductor device models
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/80755
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Institution:	National University of Singapore

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