Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

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Bibliographic Details
Main Authors:	Kao, H.L., Chin, A., Lai, J.M., Lee, C.F., Chiang, K.C., McAlister, S.P.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	2014
Subjects:	Lifetime Model NF min RF noise Stress
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/83968
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-83968
record_format	dspace
spelling	sg-nus-scholar.10635-839682015-01-08T00:23:11Z Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout Kao, H.L. Chin, A. Lai, J.M. Lee, C.F. Chiang, K.C. McAlister, S.P. ELECTRICAL & COMPUTER ENGINEERING Lifetime Model NF min RF noise Stress Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 157-160 2014-10-07T04:47:16Z 2014-10-07T04:47:16Z 2005 Conference Paper Kao, H.L.,Chin, A.,Lai, J.M.,Lee, C.F.,Chiang, K.C.,McAlister, S.P. (2005). Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout. Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium : 157-160. ScholarBank@NUS Repository. 15292517 http://scholarbank.nus.edu.sg/handle/10635/83968 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
topic	Lifetime Model NF min RF noise Stress
spellingShingle	Lifetime Model NF min RF noise Stress Kao, H.L. Chin, A. Lai, J.M. Lee, C.F. Chiang, K.C. McAlister, S.P. Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout
description	Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Kao, H.L. Chin, A. Lai, J.M. Lee, C.F. Chiang, K.C. McAlister, S.P.
format	Conference or Workshop Item
author	Kao, H.L. Chin, A. Lai, J.M. Lee, C.F. Chiang, K.C. McAlister, S.P.
author_sort	Kao, H.L.
title	Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout
title_short	Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout
title_full	Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout
title_fullStr	Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout
title_full_unstemmed	Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout
title_sort	modeling rf mosfets after electrical stress using low-noise microstrip line layout
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/83968
_version_	1681089532970139648

Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout

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