Towards high performance Ge 1-xSn x and In 0.7Ga 0.3As CMOS: A novel common gate stack featuring sub-400°C Si 2H 6 passivation, single TaN metal gate, and sub-1.3 nm EOT

10.1109/VLSIT.2012.6242480

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Main Authors: Gong, X., Su, S., Liu, B., Wang, L., Wang, W., Yang, Y., Kong, E., Cheng, B., Han, G., Yeo, Y.-C.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Conference or Workshop Item
Published: 2014
Online Access:http://scholarbank.nus.edu.sg/handle/10635/84315
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-843152015-01-08T00:43:55Z Towards high performance Ge 1-xSn x and In 0.7Ga 0.3As CMOS: A novel common gate stack featuring sub-400°C Si 2H 6 passivation, single TaN metal gate, and sub-1.3 nm EOT Gong, X. Su, S. Liu, B. Wang, L. Wang, W. Yang, Y. Kong, E. Cheng, B. Han, G. Yeo, Y.-C. ELECTRICAL & COMPUTER ENGINEERING 10.1109/VLSIT.2012.6242480 Digest of Technical Papers - Symposium on VLSI Technology 99-100 DTPTE 2014-10-07T04:51:16Z 2014-10-07T04:51:16Z 2012 Conference Paper Gong, X.,Su, S.,Liu, B.,Wang, L.,Wang, W.,Yang, Y.,Kong, E.,Cheng, B.,Han, G.,Yeo, Y.-C. (2012). Towards high performance Ge 1-xSn x and In 0.7Ga 0.3As CMOS: A novel common gate stack featuring sub-400°C Si 2H 6 passivation, single TaN metal gate, and sub-1.3 nm EOT. Digest of Technical Papers - Symposium on VLSI Technology : 99-100. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/VLSIT.2012.6242480" target="_blank">https://doi.org/10.1109/VLSIT.2012.6242480</a> 9781467308458 07431562 http://scholarbank.nus.edu.sg/handle/10635/84315 NOT_IN_WOS Scopus
institution National University of Singapore
building NUS Library
country Singapore
collection ScholarBank@NUS
description 10.1109/VLSIT.2012.6242480
author2 ELECTRICAL & COMPUTER ENGINEERING
author_facet ELECTRICAL & COMPUTER ENGINEERING
Gong, X.
Su, S.
Liu, B.
Wang, L.
Wang, W.
Yang, Y.
Kong, E.
Cheng, B.
Han, G.
Yeo, Y.-C.
format Conference or Workshop Item
author Gong, X.
Su, S.
Liu, B.
Wang, L.
Wang, W.
Yang, Y.
Kong, E.
Cheng, B.
Han, G.
Yeo, Y.-C.
spellingShingle Gong, X.
Su, S.
Liu, B.
Wang, L.
Wang, W.
Yang, Y.
Kong, E.
Cheng, B.
Han, G.
Yeo, Y.-C.
Towards high performance Ge 1-xSn x and In 0.7Ga 0.3As CMOS: A novel common gate stack featuring sub-400°C Si 2H 6 passivation, single TaN metal gate, and sub-1.3 nm EOT
author_sort Gong, X.
title Towards high performance Ge 1-xSn x and In 0.7Ga 0.3As CMOS: A novel common gate stack featuring sub-400°C Si 2H 6 passivation, single TaN metal gate, and sub-1.3 nm EOT
title_short Towards high performance Ge 1-xSn x and In 0.7Ga 0.3As CMOS: A novel common gate stack featuring sub-400°C Si 2H 6 passivation, single TaN metal gate, and sub-1.3 nm EOT
title_full Towards high performance Ge 1-xSn x and In 0.7Ga 0.3As CMOS: A novel common gate stack featuring sub-400°C Si 2H 6 passivation, single TaN metal gate, and sub-1.3 nm EOT
title_fullStr Towards high performance Ge 1-xSn x and In 0.7Ga 0.3As CMOS: A novel common gate stack featuring sub-400°C Si 2H 6 passivation, single TaN metal gate, and sub-1.3 nm EOT
title_full_unstemmed Towards high performance Ge 1-xSn x and In 0.7Ga 0.3As CMOS: A novel common gate stack featuring sub-400°C Si 2H 6 passivation, single TaN metal gate, and sub-1.3 nm EOT
title_sort towards high performance ge 1-xsn x and in 0.7ga 0.3as cmos: a novel common gate stack featuring sub-400°c si 2h 6 passivation, single tan metal gate, and sub-1.3 nm eot
publishDate 2014
url http://scholarbank.nus.edu.sg/handle/10635/84315
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