Design of a handshake asynchronous IC design tool

by Ho, Weng Geng.
Published 2009

Ultra low power asynchronous-logic quasi-delay-insensitive circuit design

by Ho, Weng Geng
Published 2016

Interceptive side channel attack on AES-128 wireless communications for IoT applications

by Pammu, Ali Akbar, Chong, Kwen-Siong, Ho, Weng-Geng, Gwee, Bah Hwee
Published 2017

A secure data-toggling SRAM for confidential data protection

by Ho, Weng-Geng, Chong, Kwen-Siong, Kim, Tony Tae-Hyoung, Gwee, Bah Hwee
Published 2022

Energy-delay efficient asynchronous-logic 16×16-bit pipelined multiplier based on Sense Amplifier-Based Pass Transistor Logic

by Ho, Weng-Geng, Chong, Kwen-Siong, Lin, Tong, Gwee, Bah Hwee, Chang, Joseph Sylvester
Published 2013

Low Normalized Energy Derivation Asynchronous Circuit Synthesis Flow through Fork-Join Slack Matching for Cryptographic Applications

by Liu, Nan, Chong, Kwen-Siong, Ho, Weng-Geng, Gwee, Bah Hwee, Chang, Joseph Sylvester
Published 2017

Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design

by Ho, Weng-Geng, Chong, Kwen-Siong, Ne, Kyaw Zwa Lwin, Gwee, Bah-Hwee, Chang, Joseph Sylvester
Published 2019

High robustness energy- and area-efficient dynamic-voltage-scaling 4-phase 4-rail asynchronous-logic Network-on-Chip (ANoC)

by Ho, Weng-Geng, Chong, Kwen-Siong, Lwin, Ne Kyaw Zwa, Chang, Joseph Sylvester, Gwee, Bah Hwee
Published 2016

A comparative study on asynchronous Quasi-Delay-Insensitive templates

by Chang, Kok-Leong, Lin, Tong, Ho, Weng-Geng, Chong, Kwen-Siong, Gwee, Bah Hwee, Chang, Joseph Sylvester
Published 2013

High Performance Low Overhead Template-based Cell-Interleave Pipeline (TCIP) for Asynchronous-Logic QDI Circuits

by Ho, Weng-Geng, Liu, Nan, Ne, Kyaw Zwa Lwin, Chong, Kwen-Siong, Gwee, Bah Hwee, Chang, Joseph Sylvester
Published 2016

Success rate model for fully AES-128 in correlation power analysis

by Pammu, Ali Akbar, Chong, Kwen-Siong, Lwin, Ne Kyaw Zwa, Ho, Weng-Geng, Liu, Nan, Gwee, Bah Hwee
Published 2017

Security analysis of asynchronous-logic QDI cell approach for differential power analysis attack

by Ho, Weng-Geng, Pammu, Ali Akbar, Liu, Nan, Ne, Kyaw Zwa Lwin, Chong, Kwen-Siong, Gwee, Bah Hwee
Published 2017

Area-efficient and low stand-by power 1k-byte transmission-gate-based non-imprinting high-speed erase (TNIHE) SRAM

by Ho, Weng-Geng, Ne, Kyaw Zwa Lwin, Prashanth Srinivas, Nagarajan, Chong, Kwen-Siong, Kim, Tony Tae-Hyoung, Gwee, Bah Hwee
Published 2016

Counteracting differential power analysis: Hiding encrypted data from circuit cells

by Chong, Kwen-Siong, Ne, Kyaw Zwa Lwin, Ho, Weng-Geng, Liu, Nan, Akbar, Ali H., Gwee, Bah-Hwee, Chang, Joseph Sylvester
Published 2016

A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)

by Ng, Jun-Sheng, Chen, Juncheng, Kyaw, Nay Aung, Lwin, Ne Kyaw Zwa, Ho, Weng-Geng, Chong, Kwen-Siong, Gwee, Bah-Hwee
Published 2021

Dual-hiding side-channel-attack resistant FPGA-based asynchronous-logic AES : design, countermeasures and evaluation

by Chong, Kwen-Siong, Ng, Jun-Sheng, Chen, Juncheng, Lwin, Ne Kyaw Zwa, Kyaw, Nay Aung, Ho, Weng-Geng, Chang, Joseph, Gwee, Bah-Hwee
Published 2021

Normalized Differential Power Analysis - for ghost peaks mitigation

by Chen, Juncheng, Ng, Jun-Sheng, Kyaw, Nay Aung, Lwin, Ne Kyaw Zwa, Ho, Weng-Geng, Chong, Kwen-Siong, Lin, Zhiping, Chang, Joseph Sylvester, Gwee, Bah-Hwee
Published 2021