A simple CMOS self-aligned double-gate poly-Si TFT technology

by Xiong, Z., Liu, H., Zhu, C., Sin, J.K.O.
Published 2014

Characteristics of high-κ spacer offset-gated polysilicon TFTs

by Xiong, Z., Liu, H., Zhu, C., Sin, J.K.O.
Published 2014

A new polysilicon CMOS self-aligned double-gate TFT technology

by Xiong, Z., Liu, H., Zhu, C., Sin, J.K.O.
Published 2014

A novel self-aligned offset-gated polysilicon TFT using high-κ dielectric spacers

by Xiong, Z., Liu, H., Zhu, C., Sin, J.K.O.
Published 2014

Folded gate LDMOS with low on-resistance and high transconductance

by Xu, S., Zhu, Y., Foo, P.-D., Liang, Y.C., Sin, J.K.O.
Published 2014

A partial SOI technology for single-chip RF power amplifiers

by Cai, J., Ren, C., Liang, Y.C., Balasubramanian, N., Sin, J.K.O.
Published 2014

Folded gate LDMOS with low on-resistance and high transconductance

by Xu, S., Zhu, Y., Foo, P.-D., Liang, Y.C., Sin, J.K.O.
Published 2014

Theoretical analysis and experimental characterization of the dummy-gated VDMOSFET

by Xu, S., Ren, C., Liang, Y.C., Foo, P.-D., Sin, J.K.O.
Published 2014

120 V interdigitated-drain LDMOS (IDLDMOS) on SOI substrate breaking power LDMOS limit

by Xu, S., Gan, K.P., Samudra, G.S., Liang, Y.C., Sin, J.K.O.
Published 2014

Folded gate LDMOS transistor with low on-resistance and high transconductance

by Zhu, Y., Liang, Y.C., Xu, S., Foo, P.-D., Sin, J.K.O.
Published 2014

The partial silicon-on-insulator technology for RF power LDMOSFET devices and on-chip microinductors

by Ren, C., Cai, J., Liang, Y.C., Ong, P.H., Balasubramanian, N., Sin, J.K.O.
Published 2014

A TaN-HfO2-Ge pMOSFET with novel SiH4 surface passivation

by Wu, N., Zhang, Q., Zhu, C., Chan, D.S.H., Du, A., Balasubramanian, N., Li, M.F., Chin, A., Sin, J.K.O., Kwong, D.-L.
Published 2014

A novel surface passivation process for HfO 2 Ge MOSFETs

by Wu, N., Zhang, Q., Zhu, C., Chan, D.S.H., Li, M.F., Balasubramanian, N., Du, A.Y., Chin, A., Sin, J.K.O., Kwong, D.-L.
Published 2014