FPGA BASED HARDWARE ACCELERATOR DESIGN FOR DEEP CONVOLUTIONAL NEURAL NETWORK
The development of hardware accelerators for deep learning is increasing rapidly with the purpose for flexibility to be applied to various deep learning architectures. Accelerators that are widely marketed today are accelerators with GPU-based architectures where developers encounter quite a l...
Saved in:
| 主要作者: | |
|---|---|
| 格式: | Theses |
| 語言: | Indonesia |
| 在線閱讀: | https://digilib.itb.ac.id/gdl/view/58018 |
| 標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|
| 機構: | Institut Teknologi Bandung |
| 語言: | Indonesia |