Bit serial modular multiplication on FPGA
RSA algorithm is a cryptographic algorithm that requires repeated modular multiplications of very large operands. In RSA, the higher the security the larger is the operand size, which may reduce the clock rate and result to lower throughput. This paper presents a fully systolic linear-array for the...
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Main Authors: | Nazar, Medi A., Kittitornkun, Surin |
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Format: | text |
Published: |
Animo Repository
2005
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Online Access: | https://animorepository.dlsu.edu.ph/faculty_research/8206 |
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Institution: | De La Salle University |
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