Hardware Implementation of an Iterative Parallel Scheduler for Optical Interconnection Networks

• Main Authors: Corvera, Jan Alain, Dumlao, Samuel Matthew G, Reyes, Rosula SJ, Castoldi, Piero, Andriolli, Nicola, Cerutti, Isabella
• Format: text
• Published: Archīum Ateneo 2016
• Subjects: Algorithms; Field programmable gate arrays; Optical networks; Electrical and Computer Engineering
• Online Access: https://archium.ateneo.edu/ecce-faculty-pubs/56; https://www.osapublishing.org/abstract.cfm?uri=Networks-2016-NeM3B.4
• Institution: Ateneo De Manila University

This paper proposes an iterative parallel scheduler for optical interconnection networks based on the longest queue first algorithm, presents an optimized hardware imple­mentation in commercial FPGA boards, and experimentally assess its performance.